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Published in 2017 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-016-0297-4
Abstract: Assessment of power consumption is very important for an efficient digital integrated circuit design. Dynamic power in digital programmable CMOS-based processors depends on the switching activity. Specifically in its subcomponents like FIR filter, power consumption…
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Keywords:
filter design;
design;
fir filter;
power ... See more keywords
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1
Published in 2017 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-016-0312-9
Abstract: Finite impulse response (FIR) filter is a fundamental element in digital signal processing (DSP) systems. Traditional implementations have been using application specific integrated circuits (ASICs) or DSP processors. However, the increase in logic capacity and…
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Keywords:
adder unit;
technology;
fir filter;
multiply adder ... See more keywords
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Published in 2018 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-017-0679-2
Abstract: In this work, an efficient design of multiplier-less digital finite impulse response (FIR) filter is presented, where the sub-expression elimination (SE) algorithms are employed on filter coefficients, and optimization is done with evolutionary algorithms. This…
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Keywords:
multiplier less;
performance cse;
cse techniques;
filter ... See more keywords
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1
Published in 2019 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-018-0897-2
Abstract: AbstractThis paper proposes a new architecture of 2-D block FIR filter using distributed arithmetic (DA) algorithm, which is known for the efficient design of multiply and accumulate block. Hardware-based architecture is proposed for DA lookup…
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Keywords:
block fir;
architecture block;
block;
fir filter ... See more keywords
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1
Published in 2021 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-020-01539-y
Abstract: This paper presents an efficient architecture for two-dimensional (2-D) adaptive FIR filter architecture using the distributed arithmetic (DA) algorithm. DA-based filter architectures essentially require look-up tables (LUT). In the proposed filter architecture, RAM- or ROM-based…
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Keywords:
using distributed;
efficient architecture;
filter;
adaptive fir ... See more keywords
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Published in 2018 at "Cluster Computing"
DOI: 10.1007/s10586-018-2067-5
Abstract: The finite impulse response (FIR) filter are class of digital filter are extensively used in signal processing and in communication system applications such as noise reduction, echo cancellation and image enhancement etc. Designing a FIR…
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Keywords:
filter;
computation sharing;
fir filter;
design ... See more keywords
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1
Published in 2022 at "Journal of Signal Processing Systems"
DOI: 10.1007/s11265-021-01723-6
Abstract: This paper proposes the implementation of a real-time finite impulse response (FIR) filter with a field-programmable gate array (FPGA) and Open Computing Language (OpenCL) designed by directly streaming the input signal. OpenCL is selected for…
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Keywords:
time;
filter;
real time;
fir filter ... See more keywords
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Published in 2024 at "Scientific Reports"
DOI: 10.1038/s41598-024-73514-5
Abstract: This article introduces a novel FIR filter using a Radix-2r multiplier combined with 4:2 and 3:2 compressors for denoising Electrooculography (EOG) signals. This approach replaces traditional ripple-carry adders with compressors to add the partial products…
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Keywords:
filter;
radix multiplier;
area;
filter using ... See more keywords
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Published in 2024 at "IEEE Access"
DOI: 10.1109/access.2024.3420098
Abstract: In recent years, pedestrian tracking algorithms have witnessed extensive utilization in various domains. Particularly noteworthy is the attention garnered by hospital pedestrian tracking due to its potential to enhance operational efficiency and patient’s safety. The…
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Keywords:
filter;
method;
pedestrian tracking;
fir filter ... See more keywords
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1
Published in 2019 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2018.2878830
Abstract: This paper presents a compact 10-b successive approximation register analog-to-digital converter (SAR ADC) in 65-nm CMOS with an integrated passive finite impulse response (FIR) filter for anti-aliasing. Conventional switched-capacitor digital-to-analog converters (DACs) are usually implemented…
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Keywords:
tex math;
inline formula;
fir filter;
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1
Published in 2019 at "IEEE Signal Processing Letters"
DOI: 10.1109/lsp.2019.2891965
Abstract: This letter presents a novel design method for multidimensional finite-impulse response (FlR) filters based on the representation of the desired frequency response by using a Gabor system generated by a Gaussian function. A direct synthesis…
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Keywords:
methodology;
design methodology;
novel fir;
fir filter ... See more keywords