FPGA based area efficient RS(23, 17) codec
Sign Up to like & getrecommendations! Published in 2017 at "Microsystem Technologies"
DOI: 10.1007/s00542-016-3058-1
Abstract: Generally in digital communication systems and storage mediums, Reed–Solomon (RS) codes are employed to detect and correct errors. RS code is a promising code for Ultra Wide Band (UWB) which is ideally suitable for wireless… read more here.
Keywords: based area; codec; efficient codec; area efficient ... See more keywords
FPGA-Based Soft-Core Processors for Image Processing Applications
Sign Up to like & getrecommendations! Published in 2017 at "Journal of Signal Processing Systems"
DOI: 10.1007/s11265-016-1185-7
Abstract: With security and surveillance, there is an increasing need to process image data efficiently and effectively either at source or in a large data network. Whilst a Field-Programmable Gate Array has been seen as a… read more here.
Keywords: image; based soft; core processors; soft core ... See more keywords
FPGA-based network intrusion detection for IEC 61850-based industrial network
Sign Up to like & getrecommendations! Published in 2018 at "ICT Express"
DOI: 10.1016/j.icte.2018.01.002
Abstract: Abstract This paper proposes an FPGA-based network intrusion detection system for the IEC 61850-based industrial network that is specially designed for substation automation. The proposed system uses the Shift-And algorithm for detecting malicious network packets… read more here.
Keywords: network; network intrusion; based network; fpga based ... See more keywords
Design and development of FPGA based simplified DNBR calculation algorithm for APR 1400 NPPs
Sign Up to like & getrecommendations! Published in 2019 at "Nuclear Engineering and Design"
DOI: 10.1016/j.nucengdes.2019.05.030
Abstract: Abstract Nuclear Power Plant Instrumentation and Control Systems are beginning to move towards Field Programmable Gate Array (FPGA) applications. This paper presents a new, simplified Departure from Nucleate Boiling Ratio (DNBR) calculation algorithm for Advanced… read more here.
Keywords: dnbr calculation; apr 1400; fpga based; calculation algorithm ... See more keywords
A Survey: FPGA‐Based Dynamic Scheduling of Hardware Tasks
Sign Up to like & getrecommendations! Published in 2021 at "Chinese Journal of Electronics"
DOI: 10.1049/cje.2021.07.021
Abstract: To meet the increasing computing needs of various application fields, Field programmable gate array (FPGA) has been widely deployed. In FPGA-based processing, hardware tasks can be better accelerated by allocating appropriate computing resources. Therefore, FPGA-based… read more here.
Keywords: task; hardware; fpga based; hardware tasks ... See more keywords
FPGA‐based active disturbance rejection velocity control for a parallel DC/DC buck converter‐DC motor system
Sign Up to like & getrecommendations! Published in 2020 at "Iet Power Electronics"
DOI: 10.1049/iet-pel.2019.0832
Abstract: This study deals with the robust velocity controller of a DC motor driven by means of parallel DC/DC buck power converters with equal current distribution, from the perspective of a generalised proportional–integral (GPI)-observers-based active disturbance… read more here.
Keywords: system; based active; velocity; parallel buck ... See more keywords
Development of FPGA-based standalone, portable TDCR system
Sign Up to like & getrecommendations! Published in 2023 at "Journal of Instrumentation"
DOI: 10.1088/1748-0221/18/05/p05016
Abstract: A standalone, lightweight, portable, FPGA-based triple to double coincidence ratio (TDCR) system is developed. The optical chamber of the system is fabricated in a dual, coaxial cylindrical geometry, with the inner cylinder made up of… read more here.
Keywords: standalone; system; fpga based; tdcr system ... See more keywords
FPGA-based experiments for demonstrating bi-stability in tabu learning neuron model
Sign Up to like & getrecommendations! Published in 2020 at "Circuit World"
DOI: 10.1108/cw-12-2019-0189
Abstract: Purpose The purpose of this paper is to develop an field programmable gate array (FPGA)-based neuron circuit to mimic dynamical behaviors of tabu learning neuron model. Design/methodology/approach Numerical investigations for the tabu learning neuron model… read more here.
Keywords: learning neuron; tabu learning; neuron model; circuit ... See more keywords
A Flexible FPGA-Based Quasi-Cyclic LDPC Decoder
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Access"
DOI: 10.1109/access.2017.2678103
Abstract: Low-density parity check (LDPC) error correction decoders have become popular in diverse communications systems, owing to their strong error correction performance and their suitability to parallel hardware implementation. A great deal of research effort has… read more here.
Keywords: ldpc decoder; ldpc; fpga based; quasi cyclic ... See more keywords
Stability of FPGA Based Emulator for Half-Bridge Inverters Operated in Stand-Alone and Grid-Connected Modes
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Access"
DOI: 10.1109/access.2018.2791978
Abstract: In this paper, we present stability of a field programmable gate array (FPGA)-based emulator for single-phase half-bridge inverters operated in stand-alone and grid connected modes. The emulator is not only sufficiently accurate to emulate the… read more here.
Keywords: half bridge; bridge inverters; based emulator; fpga based ... See more keywords
Kernel Solver Design of FPGA-Based Real-Time Simulator for Active Distribution Networks
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Access"
DOI: 10.1109/access.2018.2842076
Abstract: The field-programmable gate array (FPGA)-based real-time simulator takes advantage of many merits of FPGA, such as small time-step, high simulation precision, rich I/O interface resources, and low cost. The sparse linear equations formed by the… read more here.
Keywords: real time; time; time simulator; based real ... See more keywords