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Published in 2025 at "International Journal of Parallel Programming"
DOI: 10.1007/s10766-025-00784-5
Abstract: This paper investigates the use of High-Level Synthesis (HLS) for designing parallel hardware architectures on FPGAs. HLS compilers, like the one used in Vitis HLS, extract the available parallelism so the HLS languages should be…
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Keywords:
image processing;
fpgas;
hls;
high level ... See more keywords
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Published in 2019 at "IEEE Access"
DOI: 10.1109/access.2019.2941985
Abstract: Early compressor trees based on carry-save adders and single-column parallel counters show good performance in ASIC design, but do not adapt well to modern field-programmable gate arrays (FPGAs). Recently, compressor trees built from generalized parallel…
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Keywords:
compressor;
area;
compressor trees;
generalized parallel ... See more keywords
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Published in 2020 at "IEEE Access"
DOI: 10.1109/access.2020.2994882
Abstract: With the proliferation of embedded computing, there has been a dramatic increase in utilization of FPGAs to accelerate real-time compute/data-intensive applications on embedded platforms. FPGA-based designs typically achieve high speed-performance by leveraging parallelism in computations,…
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Keywords:
multi ported;
memory;
multi;
ported memories ... See more keywords
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Published in 2022 at "IEEE Access"
DOI: 10.1109/access.2022.3183993
Abstract: Quantum computing is regarded as the future of computing that hopefully provides exponentially large processing power compared to the conventional digital computing. However, current quantum computers do not have the capability to correct errors caused…
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Keywords:
emulator;
quantum;
fpgas;
high bandwidth ... See more keywords
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Published in 2020 at "IEEE Transactions on Computers"
DOI: 10.1109/tc.2020.3000118
Abstract: Deep convolutional Neural Networks (CNNs) have revolutionized numerous applications, but the demand for ever more performance remains unabated. Scaling CNN computations to larger clusters is generally done by distributing tasks in batch mode using methods…
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Keywords:
cnn training;
acceleration cnn;
scalable acceleration;
fpdeep scalable ... See more keywords
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Published in 2022 at "IEEE Transactions on Computers"
DOI: 10.1109/tc.2021.3075765
Abstract: FPGAs are starting to incorporate High Bandwidth Memory (HBM) to both reduce the memory bandwidth bottleneck encountered in some applications and to provide more capacity to store application state. However, the overall performance characteristics of…
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Keywords:
performance;
hbm;
fpgas;
memory ... See more keywords
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Published in 2021 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2021.3102004
Abstract: Heterogeneous SoCs integrate FPGAs and microprocessor cores on the same fabric to accelerate applications such as cryptography and deep learning. Since FPGAs share resources with the microprocessor cores, they can launch non-cacheable SDRAM transactions through…
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Keywords:
securing socs;
rowhammer attacks;
microprocessor sdram;
fpgas ... See more keywords
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Published in 2025 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2024.3419048
Abstract: Nonvolatile field-programmable gate arrays (FPGAs) offer advantages in terms of high logic density and near-zero leakage power when contrasted with conventional static random access memory-based FPGAs. However, they have a lifetime issue. To deal with…
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Keywords:
configuration files;
fpgas;
aided design;
computer aided ... See more keywords
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Published in 2024 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2024.3443708
Abstract: NV-FPGAs have attracted significant attention in research due to their high density, low leakage power, and reduced error rates. The nonvolatile memory (NVM) crossbar’s compute-in-memory (CiM) capability further enables NV-FPGAs to execute high-efficiency, high-throughput neural…
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Keywords:
task;
fpgas;
nonvolatile fpgas;
networks nonvolatile ... See more keywords
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Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2021.3130428
Abstract: Recent work has shown that small, fast, and power-efficient multiple constant multiplication (MCM) implementations can be realized on FPGAs rather than requiring specialized embedded multipliers. However, the limited silicon area on FPGAs requires applications such…
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Keywords:
topology;
exchange;
dynamic exchange;
fpgas ... See more keywords
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Published in 2023 at "IEEE Transactions on Parallel and Distributed Systems"
DOI: 10.1109/tpds.2022.3220039
Abstract: Specialized arithmetic units allow fast and efficient computation of lesser used mathematical functions. The overall impact of those units would be negligible in a general purpose processor, as added circuitry makes chips more complex despite…
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Keywords:
calculation cube;
point calculation;
floating point;
fpgas ... See more keywords