A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2018.2843337
Abstract: This paper proposes an ultra-low-voltage (ULV) fractional-N all-digital PLL (ADPLL) powered from a single 0.5-V supply. While its digitally controlled oscillator (DCO) runs directly at 0.5 V, an internal switched-capacitor dc-dc converter “doubles” the supply… read more here.
Keywords: tdc; digital pll; switched capacitor; fractional digital ... See more keywords
A Fractional-N Digital MDLL With Background Two-Point DTC Calibration
Sign Up to like & getrecommendations! Published in 2021 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2021.3098009
Abstract: This article presents a fractional-N digital multiplying delay-locked loop (MDLL) that employs a digital-to-time converter (DTC) to control the reference injection for the fractional-N operation. The presented MDLL features a background two-point DTC calibration that… read more here.
Keywords: mdll; background two; two point; fractional digital ... See more keywords
A 26GHz Fractional-N Digital Frequency Synthesizer Leveraging Noise Profiles of Three Functional Stages
Sign Up to like & getrecommendations! Published in 2021 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2021.3094932
Abstract: This work presents a low-noise millimeter-wave fractional-N digital frequency synthesizer architecture. It is formed by cascading an injection-locked frequency multiplier, an open-loop digital frequency synthesizer and an integer-N LC digital phase-locked loop. Though the individual… read more here.
Keywords: digital frequency; frequency; noise; fractional digital ... See more keywords