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Published in 2024 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2024.3368189
Abstract: The traditional shared memory architectures (MAs) used for CPU-FPGA interaction on FPGA system-on-chip (FPSoC) platforms lack the support for field-programmable gate array (FPGA) caches, resulting in increased FPGA access time to shared system data and…
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Keywords:
coherency architecture;
full coherency;
cpu;
fpga ... See more keywords