Articles with "hardware accelerator" as a keyword



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Power Efficient Design of High-Performance Convolutional Neural Networks Hardware Accelerator on FPGA: A Case Study With GoogLeNet

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Published in 2021 at "IEEE Access"

DOI: 10.1109/access.2021.3126838

Abstract: Convolutional neural networks (CNNs) have dominated image recognition and object detection models in the last few years. They can achieve the highest accuracies with several applications such as automotive and biomedical applications. CNNs are usually… read more here.

Keywords: googlenet; power; convolutional neural; performance ... See more keywords
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Effective Hardware Accelerator for 2D DCT/IDCT Using Improved Loeffler Architecture

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Published in 2022 at "IEEE Access"

DOI: 10.1109/access.2022.3146162

Abstract: This paper proposes an effective hardware accelerator for 2D $8\times 8$ discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) using an improved Loeffler architecture. The accelerator optimizes the data stream of the Loeffler… read more here.

Keywords: dct idct; architecture; dct; hardware accelerator ... See more keywords
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Row-Wise Product-Based Sparse Matrix Multiplication Hardware Accelerator With Optimal Load Balancing

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Published in 2022 at "IEEE Access"

DOI: 10.1109/access.2022.3184116

Abstract: Matrix multiplication is a main computation kernel of emerging workloads, such as deep neural networks and graph analytics. These workloads often exhibit high sparsity in data, which means a large portion of the elements in… read more here.

Keywords: load balancing; matrix; product; hardware accelerator ... See more keywords
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A Hardware Accelerator for Tracing Garbage Collection

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Published in 2019 at "IEEE Micro"

DOI: 10.1109/mm.2019.2910509

Abstract: Many workloads are written in garbage-collected languages and GC consumes a significant fraction of resources for these workloads. We propose to decrease this overhead by moving GC into a small hardware accelerator that is located… read more here.

Keywords: accelerator tracing; garbage; accelerator; hardware accelerator ... See more keywords
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Huicore: A Generalized Hardware Accelerator for Complicated Functions

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Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2022.3152799

Abstract: Emerging advanced System-on-Chip (SoC) designs contain more and more complicated functions to be accelerated. This presents a challenge to conventional design approaches which use different hardware architectures or separate hardware accelerators to implement the various… read more here.

Keywords: generalized hardware; hardware; huicore generalized; complicated functions ... See more keywords
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A Nonvolatile All-Spin Nonbinary Matrix Multiplier: An Efficient Hardware Accelerator for Machine Learning

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Published in 2022 at "IEEE Transactions on Electron Devices"

DOI: 10.1109/ted.2022.3214167

Abstract: We propose and analyze a compact and nonvolatile nanomagnetic (all-spin) nonbinary matrix multiplier performing the multiply-and-accumulate (MAC) operation using two magnetic tunnel junctions (MTJs)–one activated by strain to act as the multiplier and the other… read more here.

Keywords: matrix multiplier; nonbinary matrix; accelerator machine; machine learning ... See more keywords
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A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition

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Published in 2018 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"

DOI: 10.1109/tvlsi.2018.2846688

Abstract: Fast Fourier transform (FFT) is the kernel and the most time-consuming algorithm in the domain of digital signal processing, and the FFT sizes of different applications are very different. Therefore, this paper proposes a variable-size… read more here.

Keywords: size; fft hardware; fft; hardware accelerator ... See more keywords
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Hardware Acceleration of Sparse Oblique Decision Trees for Edge Computing

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Published in 2019 at "Elektronika ir Elektrotechnika"

DOI: 10.5755/j01.eie.25.5.24351

Abstract: This paper presents a hardware accelerator for sparse decision trees intended for FPGA applications. To the best of authors’ knowledge, this is the first accelerator of this type. Beside the hardware accelerator itself, a novel… read more here.

Keywords: decision; sparse decision; oblique decision; decision trees ... See more keywords