Hardware implementation of pseudo-random number generators based on chaotic maps
Sign Up to like & getrecommendations! Published in 2017 at "Nonlinear Dynamics"
DOI: 10.1007/s11071-017-3755-z
Abstract: We show the usefulness of bifurcation diagrams to implement a pseudo-random number generator (PRNG) based on chaotic maps. We provide details on the selection of the best parameter values to obtain high entropy and positive… read more here.
Keywords: pseudo random; implementation; random number; chaotic maps ... See more keywords
Reliable S-Box Hardware Implementation by Gate-Level Fault Masking Enhancement
Sign Up to like & getrecommendations! Published in 2019 at "Journal of Control, Automation and Electrical Systems"
DOI: 10.1007/s40313-019-00441-6
Abstract: With technology scaling, fault tolerance has become more essential for digital circuits. Some solutions, like all types of redundancies, have been proposed to increase the reliability of the systems. In this paper, we present a… read more here.
Keywords: box; logical masking; potential gates; hardware implementation ... See more keywords
Simulation and hardware implementation of demodulation for fiber optic seismic sensor with linear edge filtering method
Sign Up to like & getrecommendations! Published in 2020 at "Optical Fiber Technology"
DOI: 10.1016/j.yofte.2020.102384
Abstract: Abstract The demodulation system is a very critical component of the seismic exploration, which determines the response speed and accuracy of data acquisition of the detection system. Here, we demonstrate a simulation and hardware implementation… read more here.
Keywords: system; implementation demodulation; simulation hardware; fiber ... See more keywords
Local tone mapping algorithm and hardware implementation
Sign Up to like & getrecommendations! Published in 2018 at "Electronics Letters"
DOI: 10.1049/el.2017.3227
Abstract: A novel tone mapping algorithm and hardware implementation for displaying wide dynamic range (WDR) images are proposed. The algorithm processes WDR images in a pixel-by-pixel fashion in the logarithmic domain, and it uses the block-interpolated… read more here.
Keywords: algorithm hardware; implementation; hardware implementation; tone mapping ... See more keywords
Effective hardware implementation of Volterra filters based on reduced‐rank approaches
Sign Up to like & getrecommendations! Published in 2018 at "Electronics Letters"
DOI: 10.1049/el.2017.4776
Abstract: The focus of this Letter is on the development of a new effective approach for the hardware implementation of Volterra filters. The proposed approach is based on exploiting the different significance levels of the branches… read more here.
Keywords: reduced rank; implementation; implementation volterra; volterra filters ... See more keywords
FPGA-Based Hardware Implementation of Computationally Efficient Multi-Source DOA Estimation Algorithms
Sign Up to like & getrecommendations! Published in 2019 at "IEEE Access"
DOI: 10.1109/access.2019.2926335
Abstract: Hardware implementation of the proposed direction of arrival (DOA) estimation algorithms based on Cholesky and LDL decomposition is presented in this paper. The proposed algorithms are implemented for execution on a field programmable gate array… read more here.
Keywords: implementation; doa; estimation algorithms; doa estimation ... See more keywords
Design, Modeling and Hardware Implementation of Regenerative Braking for Electric Two-Wheelers for Hilly Roads
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Access"
DOI: 10.1109/access.2022.3229597
Abstract: The electric vehicles which operate in hilly region gain potential energy while moving uphill. Some of this energy can be recuperated to charge the battery while the vehicle moves downhill by using regenerative braking. The… read more here.
Keywords: hardware implementation; circuit; hilly roads; braking circuit ... See more keywords
SoC FPAA Hardware Implementation of a VMM+WTA Embedded Learning Classifier
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Journal on Emerging and Selected Topics in Circuits and Systems"
DOI: 10.1109/jetcas.2017.2777784
Abstract: This paper focuses on the circuit aspects required for an on-chip, on-line system on chip large-scale field-programmable analog array learning for vector-matrix multiplier (VMM) + winner-take-all (WTA) classifier structure. We start by describing the VMM+WTA… read more here.
Keywords: wta; fpaa hardware; hardware implementation; soc fpaa ... See more keywords
Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Computer Architecture Letters"
DOI: 10.1109/lca.2022.3160394
Abstract: Significant innovation has been made in the development of public-key cryptography that is able to withstand quantum attacks, known as post-quantum cryptography (PQC). This paper focuses on the development of an efficient PQC hardware implementation.… read more here.
Keywords: pqc; mml mml; hardware implementation; mml ... See more keywords
Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Computers"
DOI: 10.1109/tc.2021.3078294
Abstract: Contemporary digital infrastructures and systems use and trust Public-Key Cryptography to exchange keys over insecure communication channels. With the development and progress in the research field of quantum computers, well established schemes like RSA and… read more here.
Keywords: hardware implementation; folding bike; bike scalable; bike ... See more keywords
Efficient Hardware Implementation of DNN-Based Speech Enhancement Algorithm With Precise Sigmoid Activation Function
Sign Up to like & getrecommendations! Published in 2021 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2021.3082941
Abstract: This brief presents the hardware implementation of deep neural network-based speech enhancement algorithm (DNN-SEA) with a precise sigmoid activation function. Further, an adaptive step-size-based slope and intercept method (AS-SIM) has been developed to approximate the… read more here.
Keywords: dnn; based speech; speech enhancement; speech ... See more keywords