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Published in 2021 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2020.3031294
Abstract: First-in–first-out (FIFO) line buffers occupy considerable logic gates and consume significant power of the feature from accelerated segment test (FAST) image corner detection engine. In this study, a FAST-Chip (FAST-C) engine is proposed to eliminate…
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Keywords:
image corner;
line buffers;
corner detection;
fast image ... See more keywords