Optimized pure hardware FPGA-based implementation of active disturbance rejection control
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DOI: 10.1007/s00202-016-0495-x
Abstract: The optimized pure hardware fixed-point implementation of the active disturbance rejection control algorithm on the field programmable gate array (FPGA) is presented in this paper. The optimization of the FPGA resource occupancy is provided with… read more here.
Keywords: active disturbance; implementation; pure hardware; hardware ... See more keywords