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Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout

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1 Published in 2022 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2022.3201494

Abstract: Offloading compute-intensive kernels to hardware accelerators relies on the large degree of parallelism offered by these platforms. However, the effective bandwidth of the memory interface often causes a bottleneck, hindering the accelerator’s effective performance. Techniques… read more here.

Keywords: increasing fpga; fpga accelerators; accelerators memory; burst ... See more keywords