Sign Up to like & get
recommendations!
0
Published in 2018 at "IEEE Transactions on Computers"
DOI: 10.1109/tc.2018.2822269
Abstract: 3D integration opens up new opportunities for future multiprocessor chips by enabling fast and highly scalable 3D Network-on-Chip (NoC) topologies. However, in an aim to reduce the cost of Through-silicon via (TSV), partially vertically connected…
read more here.
Keywords:
first last;
last cost;
tsv;
adaptive routing ... See more keywords