Optimization Design on Active Guard Ring to Improve Latch-Up Immunity of CMOS Integrated Circuits
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DOI: 10.1109/ted.2019.2898317
Abstract: A new optimization design of an active guard ring has been proposed to improve latch-up immunity of CMOS integrated circuits and been successfully verified in a 0.18- $\mu \text{m}$ 1.8-/3.3-V CMOS technology. Codesigned with the… read more here.
Keywords: tex math; latch immunity; inline formula; latch ... See more keywords