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Published in 2017 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2016.2642042
Abstract: Due to the snapback holding voltage of high-voltage (HV) nMOS smaller than the maximum operating voltage, the traditional power-rail electrostatic discharge (ESD) clamp circuit implemented with such HV nMOS suffered latchup-like failure in a touch…
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Keywords:
voltage;
esd test;
level esd;
system level ... See more keywords