List-serial pipelined hardware architecture for SCL decoding of polar codes
Sign Up to like & getrecommendations! Published in 2023 at "China Communications"
DOI: 10.23919/jcc.2023.03.013
Abstract: For polar codes, the performance of successive cancellation list (SCL) decoding is capable of approaching that of maximum likelihood decoding. However, the existing hardware architectures for the SCL decoding suffer from high hardware complexity due… read more here.
Keywords: polar codes; hardware; serial pipelined; list serial ... See more keywords