Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2021.3123591
Abstract: Three-dimensional (3-D) integrated cross-point memory arrays can be used to build high-density storage-class memory systems. However, the coupled network topology caused by sharing word lines or bit lines between adjacent memory layers significantly enlarges the… read more here.
Keywords: operation; memory arrays; point memory; memory ... See more keywords
Functional Read Enabling In-Memory Computations in 1Transistor—1Resistor Memory Arrays
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2020.2975658
Abstract: ‘In-memory computing’ is an emerging paradigm that attempts to embed some aspects of logic computations inside memory arrays leading to higher throughput and lesser energy-consumption. Consequently, various in-memory compute proposals using emerging non-volatile technologies based… read more here.
Keywords: memory computations; functional read; memory arrays; memory ... See more keywords
Invited Tutorial: Analog Matrix Computing With Crosspoint Resistive Memory Arrays
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2022.3174920
Abstract: Matrix computation is ubiquitous in modern scientific and engineering fields. Due to the high computational complexity in conventional digital computers, matrix computation represents a heavy workload in many data-intensive applications, e.g., machine learning, scientific computing,… read more here.
Keywords: resistive memory; matrix; memory arrays; analog matrix ... See more keywords