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Published in 2018 at "IEEE Transactions on Parallel and Distributed Systems"
DOI: 10.1109/tpds.2017.2746081
Abstract: Field Programmable Gate Array (FPGA) boast abundant resources with which to realise high-performance accelerators for computationally demanding operations. Highly efficient accelerators may be automatically derived from Signal Flow Graph (SFG) models by using architectural synthesis…
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Keywords:
architectural synthesis;
simd dataflow;
multi simd;
synthesis multi ... See more keywords