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Published in 2018 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-017-0679-2
Abstract: In this work, an efficient design of multiplier-less digital finite impulse response (FIR) filter is presented, where the sub-expression elimination (SE) algorithms are employed on filter coefficients, and optimization is done with evolutionary algorithms. This…
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Keywords:
multiplier less;
performance cse;
cse techniques;
filter ... See more keywords
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Published in 2021 at "IEEE Journal on Emerging and Selected Topics in Circuits and Systems"
DOI: 10.1109/jetcas.2021.3116044
Abstract: As the demand for neural network operations on edge devices increases, energy-efficient neural network inference solutions become necessary. To this end, this paper proposes a compact 4-bit number format (SD4) for neural network weights. In…
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Keywords:
network;
multiplier less;
neural network;
edge devices ... See more keywords
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Published in 2020 at "IEEE Transactions on Signal Processing"
DOI: 10.1109/tsp.2020.3021245
Abstract: Ramanujan's sum has been recently applied to detect different periodic components in 2D image. By filtering in frequency domain and obtaining the least common multiplier (lcm) of periodicity matrices, the basic 2D periodic pattern can…
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Keywords:
multiplier less;
dimensional efficient;
bius function;
ramanujan ... See more keywords