Accelerating NoC Verification Using a Complete Model and Active Window
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Access"
DOI: 10.1109/access.2022.3199671
Abstract: This work presents formal modeling of Network-on-Chip (NoC) considering detailed functional units of NoC. The intricate modeling of NoC router components like buffer, switch, and arbiter is accomplished using Finite State Machine (FSM). As in… read more here.
Keywords: functional units; accelerating noc; verification using; model ... See more keywords