A 12-Gbps, 0.24-pJ/b/dB PAM-4 Receiver With Dead-Zone Free SS-MMSE PD for CIS Link
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Access"
DOI: 10.1109/access.2023.3275441
Abstract: This paper presents a PAM-4 receiver (RX) for CMOS image sensor (CIS) link. A robust baud-rate PAM-4 phase detector (PD) is proposed, which alleviates the dead zone issue encountered in the conventional sign-sign Mueller-Muller (SS-MM)… read more here.
Keywords: pam receiver; dead zone; cis link; sign ... See more keywords
A 56-Gb/s PAM-4 Receiver Using Time-Based LSB Decoder and S/H Technique for Robustness to Comparator Voltage Variations
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2021.3098821
Abstract: This article presents a 0.975-pJ/bit 56-Gb/s pulse amplitude modulation-4 (PAM-4) receiver using a time-based least significant bit (LSB) decoder in 28-nm CMOS technology. The proposed time-domain decision technique improves the robustness of comparator voltage variations… read more here.
Keywords: lsb decoder; pam receiver; time; reference ... See more keywords
PAM-4 Receiver With 1-Tap DFE Using Clocked Comparator Offset Instead of Threshold Voltages for Improved LSB BER Performance
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Transactions on Circuits and Systems I: Regular Papers"
DOI: 10.1109/tcsi.2023.3241929
Abstract: This study presents a wireline pulse amplitude modulation-4 (PAM-4) receiver using the least significant bit (LSB) decoding method that uses the offset of comparators. The proposed LSB decoding method can generate the same output as… read more here.
Keywords: pam receiver; comparator; dfe; bit ... See more keywords