The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing
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DOI: 10.1109/tetc.2020.3011663
Abstract: In order to provide performance increases despite the end of Moore’s law and Dennard scaling, architectures aggressively exploit data- and thread-level parallelism using billions of transistors on a single chip, enabled by extreme geometry miniaturization.… read more here.
Keywords: mixed critical; information processing; processing factory; self aware ... See more keywords