Articles with "parallel prefix" as a keyword



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Parallel-Prefix Adder in Spin-Orbit Torque Magnetic RAM for High Bit-Width Non-Volatile Computation

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Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3214504

Abstract: Recently, many computing-in-memory (CIM) systems based on non-volatile devices have been implemented well. However, they perform poorly in high bit-width processes due to device access latency and energy cost. In this brief, we present an… read more here.

Keywords: high bit; spin orbit; bit width; prefix adder ... See more keywords
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AxPPA: Approximate Parallel Prefix Adders

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Published in 2023 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"

DOI: 10.1109/tvlsi.2022.3218021

Abstract: Addition units are widely used in many computational kernels of several error-tolerant applications such as machine learning and signal, image, and video processing. Besides their use as stand-alone, additions are essential building blocks for other… read more here.

Keywords: prefix adders; prefix; parallel prefix; approximate parallel ... See more keywords