A new approach for 10-bit pipeline analog-to-digital converter design based on 0.18 µm CMOS technology
Sign Up to like & getrecommendations! Published in 2019 at "AEU - International Journal of Electronics and Communications"
DOI: 10.1016/j.aeue.2018.10.030
Abstract: Abstract This paper presents a new structure for designing a pipeline analog-to-digital convertor with a speed of 100 MS/s, based on TSMC 0.18 µm CMOS technology. With this structure, we extracted primary bits from the input… read more here.
Keywords: analog digital; cmos technology; pipeline analog; digital converter ... See more keywords
Fast Background Calibration of Linear and Non-Linear Errors in Pipeline Analog-to-Digital Converters
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2021.3135424
Abstract: The CMOS scaling and power usage limitations make the calibration techniques inevitable in the design and implementation of pipeline analog-to-digital converters (ADCs) especially in high speed and high-resolution applications. In this brief, a new digital… read more here.
Keywords: analog; pipeline analog; pipeline; digital converters ... See more keywords