Articles with "pipeline scheduler" as a keyword



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AMPS: An Automated Mesochronous Pipeline Scheduler and Design Space Explorer for High Performance Digital Circuits

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Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2021.3138139

Abstract: In the Mesochronous Pipeline (MP), the clock period is the maximal of differences between the maximum/minimum delays of all stages. This value is less than the maximum delay between the memory elements, so MP is… read more here.

Keywords: pipeline scheduler; performance digital; automated mesochronous; mesochronous pipeline ... See more keywords