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Published in 2023 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2022.3227139
Abstract: A clock generator using a fast-locking frequency-locked loop (FLL)-based RC oscillator and delta-sigma fractional dividers (FDIVs) to generate programmable temperature-insensitive output frequencies is presented. Successive approximation register (SAR) logic is used to speed up the…
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Keywords:
clock generator;
programmable temperature;
100 mhz;
clock ... See more keywords