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Published in 2018 at "IEEE Transactions on Circuits and Systems I: Regular Papers"
DOI: 10.1109/tcsi.2018.2858291
Abstract: Speed-path debugging at the post-silicon stage due to timing variations is a challenging problem in designing high-performance digital circuits. In this paper, we propose an efficient and scalable method for automatic speed-path debugging which is…
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Keywords:
speed;
timing variations;
post silicon;
qbf based ... See more keywords