Variation-tolerant, low-power, and high endurance read scheme for memristor memories
Sign Up to like & getrecommendations! Published in 2020 at "Analog Integrated Circuits and Signal Processing"
DOI: 10.1007/s10470-020-01702-0
Abstract: Reading the memristor memory cell without changing its resistance state is one of the potential problems to be addressed in the memristor-based memory design. This paper presents a novel read scheme that achieves a non-destructive… read more here.
Keywords: memristor; high endurance; read scheme; power ... See more keywords
Highly Reliable Two-Step Charge-Pump Read Scheme for 1.5 F2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2017.2778246
Abstract: Among the emerging types of memory, resistive random-access memory (ReRAM) units offer faster write speeds and consume less power than those of flash memory units. With the advancement of 3-D stack technology, 3-D nonvolatile memories… read more here.
Keywords: reram; bit nonlinear; read scheme; nonlinear sub ... See more keywords