LAUSR

Reconfigurable Logic-in-Memory Computing Based on a Polarity-Controllable Two-Dimensional Transistor.

Sign Up to like & get
recommendations!
2 Published in 2023 at "Nano letters"

DOI: 10.1021/acs.nanolett.3c01248

Abstract: Logic-in-memory architecture holds great promise to meet the high-performance and energy-efficient requirements of data-intensive scenarios. Two-dimensional compacted transistors embedded with logic functions are expected to extend Moore's law toward advanced nodes. Here we demonstrate that… read more here.

Keywords: transistor; two dimensional; logic memory; reconfigurable logic ... See more keywords

Ambipolar Barristors for Reconfigurable Logic Circuits.

Sign Up to like & get
recommendations!
0 Published in 2017 at "Nano letters"

DOI: 10.1021/acs.nanolett.6b04417

Abstract: Vertical heterostructures based on graphene have emerged as a unique architecture for novel electronic devices with unusual characteristics. Here we report a new design of vertical ambipolar barristors based on metal-graphene-silicon-graphene sandwich structure, using the… read more here.

Keywords: graphene; barristors reconfigurable; ambipolar barristors; reconfigurable logic ... See more keywords

Size-Independent Reconfigurable Logic Gate with Bismuth Oxide Based Photoelectrochemical Device.

Sign Up to like & get
recommendations!
2 Published in 2023 at "Journal of the American Chemical Society"

DOI: 10.1021/jacs.2c13873

Abstract: XOR gate, an important building block in computational circuits, is often constructed by combining other basic logic gates, and the hybridity inevitably leads to its complexity. A photoelectrochemical device could realize XOR function based on… read more here.

Keywords: independent reconfigurable; size independent; size; photoelectrochemical device ... See more keywords

Monolithic Three-Dimensional 65-nm CMOS-Nanoelectromechanical Reconfigurable Logic for Sub-1.2-V Operation

Sign Up to like & get
recommendations!
0 Published in 2017 at "IEEE Electron Device Letters"

DOI: 10.1109/led.2017.2726685

Abstract: Monolithic three-dimensional (M3D) CMOS-nanoelectromechanical (CMOS-NEM) reconfigurable logic (RL) circuits are experimentally demonstrated. This is the first experimental demonstration of 65-nm M3D CMOS-NEM RL circuits satisfying the 1.2-V supply voltage ( ${V}_{\mathsf {DD}}$ ) requirement of… read more here.

Keywords: three dimensional; dimensional cmos; cmos nanoelectromechanical; reconfigurable logic ... See more keywords

Graphene/Ferroelectric (Ge-Doped HfO2) Adaptable Transistors Acting as Reconfigurable Logic Gates

Sign Up to like & get
recommendations!
1 Published in 2022 at "Nanomaterials"

DOI: 10.3390/nano12020279

Abstract: We present an array of 225 field-effect transistors (FETs), where each of them has a graphene monolayer channel grown on a 3-layer deposited stack of 22 nm control HfO2/5 nm Ge-HfO2 intermediate layer/8 nm tunnel… read more here.

Keywords: hfo2; logic gates; doped hfo2; ferroelectric doped ... See more keywords