Reference Oversampling PLL Achieving −256-dB FoM and −78-dBc Reference Spur
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DOI: 10.1109/jssc.2021.3089930
Abstract: This article presents a low jitter, low power, low reference spur LC oscillator-based reference oversampling digital phase locked loop (OSPLL). The proposed reference oversampling architecture simultaneously offers a low in-band phase noise, a wide-bandwidth, and… read more here.
Keywords: reference spur; reference oversampling; dbc; reference ... See more keywords