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Published in 2021 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2020.2995326
Abstract: This work presents a low-jitter, low-reference-spur ring voltage-controlled oscillator (ring VCO)-based injection-locked clock multiplier (ILCM). Since the proposed triple-point frequency/phase/slope calibrator (TP-FPSC) can accurately remove the three root causes of the frequency errors of ILCMs…
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Keywords:
jitter low;
reference;
injection;
reference spur ... See more keywords
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Published in 2021 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2021.3089930
Abstract: This article presents a low jitter, low power, low reference spur LC oscillator-based reference oversampling digital phase locked loop (OSPLL). The proposed reference oversampling architecture simultaneously offers a low in-band phase noise, a wide-bandwidth, and…
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Keywords:
reference spur;
reference oversampling;
dbc;
reference ... See more keywords
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2
Published in 2023 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2022.3223629
Abstract: This article presents the first cryogenic phase-locked loop (PLL) operating at 4.2 K. The PLL is designed for the control system of scalable quantum computers. The specifications of PLL are derived from the required control…
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Keywords:
quantum;
cryo cmos;
pll;
phase ... See more keywords