Synthesis of Regular Expressions Revisited: From PSL SEREs to Hardware
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DOI: 10.1109/tcad.2016.2600241
Abstract: We revisit the specification of control circuits and protocols written as regular expressions, and propose a synthesizable subset of the sequences that can be written in the property specification language and system Verilog assertions standards.… read more here.
Keywords: regular expressions; seres hardware; synthesis regular; revisited psl ... See more keywords