A Scalable FPGA Architecture With Adaptive Memory Utilization for GEMM-Based Operations
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DOI: 10.1109/tvlsi.2025.3571677
Abstract: Deep neural network (DNN) inference relies increasingly on specialized hardware for high computational efficiency. This work introduces a field-programmable gate array (FPGA)-based dynamically configurable accelerator featuring systolic arrays (SAs), high-bandwidth memory (HBM), and UltraRAMs. We… read more here.
Keywords: architecture; fpga architecture; memory; scalable fpga ... See more keywords