A Scan Obfuscation Guided Design-for-Security Approach for Sequential Circuits
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2019.2915606
Abstract: Logic locking, a popular countermeasure against IP piracy and counterfeiting, has been a target of several attacks, especially Boolean satisfiability attacks. The state-of-the-art solutions against SAT attack struggle to meet a fundamental criterion of logic… read more here.
Keywords: sequential circuits; guided design; logic locking; obfuscation guided ... See more keywords
Security Analysis of Scan Obfuscation Techniques
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Transactions on Information Forensics and Security"
DOI: 10.1109/tifs.2023.3265815
Abstract: Scan is the de-facto standard for testing, which provides high observability and test coverage by enabling direct access to chip memory elements. The scan-based Design-for-Testability (DfT) technique has also become the prime target of attackers… read more here.
Keywords: obfuscation; scan obfuscation; security analysis; obfuscation techniques ... See more keywords