Causal Path Identification for Timed and Sequential Circuits
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2021.3068097
Abstract: Self-timed and pulse mode circuit modules are often implemented using combinational logic with feedback, or require timing constraints for the circuit to function correctly. Identifying causal paths through these circuit modules is a fundamental requirement… read more here.
Keywords: timing; identifying causal; circuit; sequential circuits ... See more keywords
A Scan Obfuscation Guided Design-for-Security Approach for Sequential Circuits
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2019.2915606
Abstract: Logic locking, a popular countermeasure against IP piracy and counterfeiting, has been a target of several attacks, especially Boolean satisfiability attacks. The state-of-the-art solutions against SAT attack struggle to meet a fundamental criterion of logic… read more here.
Keywords: sequential circuits; guided design; logic locking; obfuscation guided ... See more keywords