The Domain-Specific Language Strumok for Describing Actor-Oriented Systems with Shared Memory
Sign Up to like & getrecommendations! Published in 2018 at "Cybernetics and Systems Analysis"
DOI: 10.1007/s10559-018-0085-1
Abstract: The domain-specific language (DSL) Strumok is proposed for describing inter-actor interaction and operation with shared memory. The efficiency of the language Strumok in comparison with that of the Java Vert.x framework is assessed using shared… read more here.
Keywords: domain specific; specific language; language strumok; language ... See more keywords
Decoupled MapReduce for Shared-Memory Multi-Core Architectures
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Computer Architecture Letters"
DOI: 10.1109/lca.2018.2827929
Abstract: Modern multi-core processors exhibit high integration densities, e.g., up to several tens of cores. Multiple programming frameworks have emerged to facilitate the development of highly parallel applications. The MapReduce programming model, after having demonstrated its… read more here.
Keywords: multi; decoupled mapreduce; shared memory; memory multi ... See more keywords
EveCheck: An Event-Driven, Scalable Algorithm for Coherent Shared Memory Verification
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2022.3178051
Abstract: Cache coherence and relaxed memory consistency challenge the design verification of multicore chips. The well-known self-checking approach based on litmus tests has been successful in uncovering design errors, but it leads to limited coverage. That… read more here.
Keywords: shared memory; design; verification; memory ... See more keywords
Traffic-Aware Buffer Management in Shared Memory Switches
Sign Up to like & getrecommendations! Published in 2022 at "IEEE/ACM Transactions on Networking"
DOI: 10.1109/tnet.2022.3173930
Abstract: Switch buffer serves an important role in the modern internet. To achieve efficiency, today’s switches often use on-chip shared memory. Shared memory switches rely on buffer management policies to allocate buffer among ports. To avoid… read more here.
Keywords: traffic; shared memory; buffer management; buffer ... See more keywords
A Parallel Algorithm to Accelerate DEVS Simulations in Shared Memory Architectures
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Transactions on Parallel and Distributed Systems"
DOI: 10.1109/tpds.2023.3256083
Abstract: We propose a new algorithm for the execution of Discrete Event System Specification (DEVS) simulations on parallel shared memory architectures. Our approach executes parallel discrete-event simulations by executing all tasks in the PDEVS simulation protocol… read more here.
Keywords: memory architectures; devs simulations; parallel algorithm; shared memory ... See more keywords
Maintaining Scalability of Test Generation Using Multicore Shared Memory Systems
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2019.2947183
Abstract: Taking advantage of multicore architectures can provide significant improvement for many design automation problems. However, the parallelization procedure introduces challenges, such as workload duplication, limited search space exploration, and race contention among different threads. In… read more here.
Keywords: generation; test; shared memory; generation using ... See more keywords