Architectural Synthesis of Multi-SIMD Dataflow Accelerators for FPGA
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Transactions on Parallel and Distributed Systems"
DOI: 10.1109/tpds.2017.2746081
Abstract: Field Programmable Gate Array (FPGA) boast abundant resources with which to realise high-performance accelerators for computationally demanding operations. Highly efficient accelerators may be automatically derived from Signal Flow Graph (SFG) models by using architectural synthesis… read more here.
Keywords: architectural synthesis; simd dataflow; multi simd; synthesis multi ... See more keywords