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Published in 2018 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2018.2855050
Abstract: This brief presents a low-power low-jitter relaxation oscillator for on-chip low-frequency clock generation. A dynamic common-gate comparator is proposed to reduce the power, combined with a slope boosting technique to reduce the period jitter. A…
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Keywords:
relaxation oscillator;
boosting technique;
slope boosting;
comparator ... See more keywords