SoC FPAA Hardware Implementation of a VMM+WTA Embedded Learning Classifier
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DOI: 10.1109/jetcas.2017.2777784
Abstract: This paper focuses on the circuit aspects required for an on-chip, on-line system on chip large-scale field-programmable analog array learning for vector-matrix multiplier (VMM) + winner-take-all (WTA) classifier structure. We start by describing the VMM+WTA… read more here.
Keywords: wta; fpaa hardware; hardware implementation; soc fpaa ... See more keywords