Design optimization for an SOI MOEMS accelerometer
Sign Up to like & getrecommendations! Published in 2018 at "Microsystem Technologies"
DOI: 10.1007/s00542-017-3370-4
Abstract: With optimization being vital, the design optimization of a silicon-on-insulator (SOI) micro-opto-electro-mechanical systems accelerometer is discussed in this paper. This process has enabled a simplistic design that employs double-sided deep reactive ion etching (DRIE) on… read more here.
Keywords: soi moems; optimization soi; design optimization; optimization ... See more keywords
Improvement of Nanoscale SOI MOSFET Heating Effects by Vertical Gaussian Drain-Source Doping Region
Sign Up to like & getrecommendations! Published in 2020 at "Silicon"
DOI: 10.1007/s12633-020-00453-x
Abstract: This paper presents an efficient method to improve the heating effects in Nanoscale SOI MOSFET with the Vertical Gaussian Doping Profile in Drain and Source regions (D-S-G-SOI). Three different structures are investigated: uniform drain (C-SOI),… read more here.
Keywords: soi mosfet; drain; soi; drain source ... See more keywords
Performance evaluation of an SOI pixel sensor with in-pixel binary counters
Sign Up to like & getrecommendations! Published in 2018 at "Radiation Detection Technology and Methods"
DOI: 10.1007/s41605-018-0043-5
Abstract: IntroductionPixel detectors fabricated with the silicon-on-insulator (SOI) technology suffered from the digital pickup, due to the capacitive coupling between the sensing electrode and the in-pixel circuit. In order to tackle this issue, an advanced process… read more here.
Keywords: sensor; soi; noise; performance ... See more keywords
Rire de soi : étude d’un Moi contorsionniste
Sign Up to like & getrecommendations! Published in 2020 at "Evolution Psychiatrique"
DOI: 10.1016/j.evopsy.2020.04.005
Abstract: Resume Objectif Cet article vise a approfondir notre comprehension de l’attitude humoristique a travers le prisme de l’humoriste lorsque celui-ci se prend pour objet. Methode En prenant appui sur le texte intitule l’Humour (1927), nous… read more here.
Keywords: moi; tude moi; rire soi; soi tude ... See more keywords
Fabry–Perot resonators with transverse coupling on SOI using loop mirrors
Sign Up to like & getrecommendations! Published in 2018 at "Optics Communications"
DOI: 10.1016/j.optcom.2018.01.054
Abstract: Abstract A novel integrated transversely coupled Fabry–Perot resonator using loop mirrors as the end reflectors are demonstrated via simulations and experiments on the silicon-on-insulator (SOI) platform. The resonator is formed by connecting two loop mirrors… read more here.
Keywords: using loop; loop mirrors; cavity; soi ... See more keywords
A novel nanoscale SOI MOSFET by embedding undoped region for improving self-heating effect
Sign Up to like & getrecommendations! Published in 2018 at "Superlattices and Microstructures"
DOI: 10.1016/j.spmi.2018.04.007
Abstract: Abstract Because of the low thermal conductivity of the SiO2 (oxide), the Buried Oxide (BOX) layer in a Silicon-On-Insulator Metal-Oxide Semiconductor Field-Effect Transistor (SOI MOSFET) prevents heat dissipation in the silicon layer and causes increase… read more here.
Keywords: soi mosfet; region; soi; device ... See more keywords
Investigation of total ionizing dose effect on SOI tunnel FET
Sign Up to like & getrecommendations! Published in 2019 at "Superlattices and Microstructures"
DOI: 10.1016/j.spmi.2019.106186
Abstract: Abstract In this paper, effect of gamma radiation on SOI-based Tunnel Field Effect Transistor and its application as radiation dosimeter has been investigated. Throughout the paper, the exhaustive simulations have been carried out in order… read more here.
Keywords: region; radiation; soi; investigation total ... See more keywords
Reconfigurable ultra-thin film GDNMOS device for ESD protection in 28 nm FD-SOI technology
Sign Up to like & getrecommendations! Published in 2017 at "Solid-state Electronics"
DOI: 10.1016/j.sse.2016.10.026
Abstract: Abstract We propose a novel ESD protection device (GDNMOS: Gated Diode merged NMOS) fabricated with 28 nm UTBB FD-SOI high-k metal gate technology. By modifying the combination of the diode and transistor gate stacks, the robustness… read more here.
Keywords: protection; gdnmos; esd protection; soi ... See more keywords
Second Harmonic Generation characterization of SOI wafers: Impact of layer thickness and interface electric field
Sign Up to like & getrecommendations! Published in 2017 at "Solid-state Electronics"
DOI: 10.1016/j.sse.2017.12.006
Abstract: Abstract In this work, we investigate Second Harmonic Generation (SHG) as a non-destructive characterization method for Silicon-On-Insulator (SOI) materials. For thick SOI stacks, the SHG signal is related to the thickness variations of the different… read more here.
Keywords: harmonic generation; shg; soi; second harmonic ... See more keywords
Optimisation of EGR and SOI for better combustion characteristics using response surface methodology
Sign Up to like & getrecommendations! Published in 2019 at "International Journal of Ambient Energy"
DOI: 10.1080/01430750.2019.1612782
Abstract: This paper investigates the combined effect of exhaust gas recirculation (EGR) and Start of Injection (SOI) on the performance and emissions of a caterpillar 3401 CI engine. To study this, the numerical analysis is carried… read more here.
Keywords: egr soi; methodology; soi; optimisation egr ... See more keywords
Radio-Frequency Characteristics of Partial Dielectric Removal HR-SOI and TR-SOI Substrates
Sign Up to like & getrecommendations! Published in 2017 at "Chinese Physics Letters"
DOI: 10.1088/0256-307x/34/6/068101
Abstract: High-resistivity silicon-on-insulator (HR-SOI) and trap-rich high-resistivity silicon-on-insulator (TR-SOI) substrates have been widely adopted for high-performance rf integrated circuits. Radio-frequency loss and non-linearity characteristics are measured from coplanar waveguide (CPW) transmission lines fabricated on HR-SOI and… read more here.
Keywords: soi substrates; radio frequency; soi soi; soi ... See more keywords