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Published in 2018 at "Solid-state Electronics"
DOI: 10.1016/j.sse.2018.04.001
Abstract: Abstract This work details the analysis of wafer level global process variability in 28 nm FD-SOI using split C-V measurements. The proposed approach initially evaluates the native on wafer process variability using efficient extraction methods on…
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Keywords:
wafer level;
variability soi;
variability;
process ... See more keywords