Low Power Consuming 1 KB (32 × 32) Memory Array Using Compact 7T SRAM Cell
Sign Up to like & getrecommendations! Published in 2017 at "Wireless Personal Communications"
DOI: 10.1007/s11277-017-4226-z
Abstract: Rapid increase in technology is showing a great perception in assessing the complexity of design that can be integrated on a single chip dramatically. Minimum feature sizes, low power consumption, minimum cost and high performance… read more here.
Keywords: array; sram; sram cell; low power ... See more keywords
Dependency of well-contact density on MCUs in 65-nm bulk CMOS SRAM
Sign Up to like & getrecommendations! Published in 2017 at "Science China Information Sciences"
DOI: 10.1007/s11432-017-9549-8
Abstract: Dear editor, In custom static random access memory (SRAM) cell, radiation-induced single bit upsets (SBUs) are considered as the main cause of soft error [1]. Advanced technologies and scaling down of feature sizes have made… read more here.
Keywords: mcu; well contact; density; sram ... See more keywords
A novel charge recycle read write assist technique for energy efficient and fast 20 nm 8T-SRAM array
Sign Up to like & getrecommendations! Published in 2018 at "Solid-state Electronics"
DOI: 10.1016/j.sse.2018.07.005
Abstract: Abstract The read instability of conventional 6T-SRAM cell has made the 8T-SRAM cell a substitute for high data reliability. But the single ended nature of read operation demands a complete Vdd swing of high capacitive… read more here.
Keywords: technique; energy; assist technique; sram ... See more keywords
Design of an enhanced write stability, high-performance, low power 11T SRAM cell
Sign Up to like & getrecommendations! Published in 2021 at "International Journal of Electronics"
DOI: 10.1080/00207217.2020.1870738
Abstract: In the present era of diminishing technology nodes, stability and performance of SRAM cells deteriorate. To cope up with the above growing concerns, a new 11 T SRAM cell has been proposed which imp... read more here.
Keywords: sram; sram cell; performance; design enhanced ... See more keywords
Cache performance of NV-STT-MRAM with scale effect and comparison with SRAM
Sign Up to like & getrecommendations! Published in 2021 at "International Journal of Electronics"
DOI: 10.1080/00207217.2021.1908630
Abstract: ABSTRACT Cache is the bridge between CPU and memory for data exchange, which consumes up to 45% of the entire CPU energy. Low power cache and memory are urgently required for the computer system. The… read more here.
Keywords: sram; cache; performance; stt mram ... See more keywords
Process Corners Analysis of Data Retention Voltage (DRV) for 6T, 8T, and 10T SRAM Cells at 45 nm
Sign Up to like & getrecommendations! Published in 2019 at "IETE Journal of Research"
DOI: 10.1080/03772063.2017.1393351
Abstract: ABSTRACT The quest for low power increases with the advancement in technology as a result of continuous device scaling. Static random access memory (SRAM) represents the technology workhorse due to its compatibility with the logic.… read more here.
Keywords: analysis; sram; process; retention voltage ... See more keywords
Low Power Neural Network by Reducing SRAM Operating Voltage
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Access"
DOI: 10.1109/access.2022.3219208
Abstract: With advancements in machine learning technology, networks are becoming increasingly complex, and the extent of the computation involved is increasing. Consequently, the computation time and power consumption of the learning process are increased. The error… read more here.
Keywords: power consumption; low power; sram; operating voltage ... See more keywords
A New 8T Hybrid Nonvolatile SRAM With Ferroelectric FET
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Journal of the Electron Devices Society"
DOI: 10.1109/jeds.2020.2972319
Abstract: This paper proposes a new 8T nonvolatile SRAM (nvSRAM) cell employing ULP FinFETs and ferroelectric FinFETs to enable energy-efficient and low-latency store/recall operations. Different from other types of nvSRAM requiring additional circuitry or nonvolatile memories… read more here.
Keywords: nonvolatile sram; sram ferroelectric; cell; sram ... See more keywords
Investigation of Radiation Hardened TFET SRAM Cell for Mitigation of Single Event Upset
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Journal of the Electron Devices Society"
DOI: 10.1109/jeds.2020.3002265
Abstract: This study analyzes the soft error sensitivity of SRAM cell which employs double-gate tunnel field effect transistor (DG TFET). The mitigation technique for the data recovery after the heavy ion strike is discussed. The conventional… read more here.
Keywords: radiation; tfet sram; sram cell; mitigation ... See more keywords
Enabling In-Memory Computations in Non-Volatile SRAM Designs
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Journal on Emerging and Selected Topics in Circuits and Systems"
DOI: 10.1109/jetcas.2022.3174148
Abstract: The rapid growth in development of neural networks has necessitated the requirement of large capacity on-chip SRAM’s for Machine Learning accelerators. This has resulted in SRAM’s occupying significant portion of the die area. Furthermore, due… read more here.
Keywords: sram; enabling memory; rram; bitcell ... See more keywords
A Selective Bit Dropping and Encoding Co-Strategy in Image Processing for Low-Power Design in DRAM and SRAM
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Journal on Emerging and Selected Topics in Circuits and Systems"
DOI: 10.1109/jetcas.2023.3234402
Abstract: A novel and efficient way of image processing is proposed in this paper, which fully exploits the features of DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory) as well as the human… read more here.
Keywords: power consumption; bit; sram; power ... See more keywords