A 4 × 4 8T-SRAM array with single-ended read and differential write scheme for low voltage applications
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DOI: 10.1088/1361-6641/abf7d3
Abstract: In ultra-low-power applications, the design of power-efficient static random access memory (SRAM) is a major concern as it plays a significant part in leakage due to its higher density. In this paper, we have designed… read more here.
Keywords: sram array; power; single ended; array single ... See more keywords