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   Articles with "sram based" as a keyword



Dynamic heavy ions SEE testing of NanoXplore radiation hardened SRAM-based FPGA: Reliability-performance analysis

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recommendations! Published in 2019 at "Microelectronics Reliability"

DOI: 10.1016/j.microrel.2019.113437

Abstract: Abstract NanoXplore is the European pioneer vendor to develop ITAR-free radiation-hardened SRAM-based FPGAs. This work is the first to explore dynamic SEE tests in the NG-Medium FPGA device. The reliability-performance analysis of an embedded unmitigated… read more here.

Keywords: radiation hardened; hardened sram; sram based; performance ... See more keywords
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Measurement of Radiation Absorbed Dose Effects in SRAM-Based FPGAs

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recommendations! Published in 2020 at "Iete Journal of Research"

DOI: 10.1080/03772063.2020.1768159

Abstract: As of now, SRAM-based FPGAs are mainly preferred in the non-safety applications of NPPs. If the susceptibility to radiation effects of SRAM-FPGAs improves further, then the reliability of the appli... read more here.

Keywords: measurement radiation; based fpgas; sram based; radiation absorbed ... See more keywords

Proton-induced radiation effects in the I/O blocks of an SRAM-based FPGA

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recommendations! Published in 2019 at "Journal of Instrumentation"

DOI: 10.1088/1748-0221/14/10/t10001

Abstract: This work presents an experimental study of the proton-induced failures in the Input/Output blocks and in the associated configuration of an SRAM-based Field Programmable Gate Array (FPGA) using a single inverter ring oscillator-configuration. The tests… read more here.

Keywords: cm2 device; proton induced; radiation effects; induced radiation ... See more keywords

Compact SRAM-Based PUF Chip Employing Body Voltage Control Technique

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recommendations! Published in 2022 at "IEEE Access"

DOI: 10.1109/access.2022.3153359

Abstract: This paper presents an ultra-small physical unclonable function (PUF) chip structure to protect data in compact IoT sensor devices. The proposed PUF has far fewer transistors and a reduced active area compared to the conventional… read more here.

Keywords: structure; area; based puf; sram based ... See more keywords

A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-Based FPGAs

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recommendations! Published in 2018 at "IEEE Transactions on Computers"

DOI: 10.1109/tc.2018.2792445

Abstract: Soft errors are an important issue for SRAM-based Field Programmable Gate Arrays (FPGAs), since they result in permanent alterations of the mapped circuit when they affect their configuration memory. Concurrent Error Detection (CED) techniques, such… read more here.

Keywords: concurrent error; detection; error; fast fourier ... See more keywords

SUN: Dynamic Hybrid-Precision SRAM-Based CIM Accelerator With High Macro Utilization Using Structured Pruning Mixed-Precision Networks

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recommendations! Published in 2024 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2024.3358583

Abstract: Convolutional neural networks (CNNs) play a key role in many deep learning applications; however, these networks are resource intensive. The parallel computing ability of computing-in-memory (CIM) enables high energy efficiency in artificial intelligence accelerators. When… read more here.

Keywords: sram based; precision; hybrid precision; mixed precision ... See more keywords

Automated Bitstream-Level Cost-Reliability Design-Space Exploration for SRAM-Based FPGAs

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recommendations! Published in 2025 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2025.3573225

Abstract: Triple modular redundancy (TMR) is a common approach to mitigate the effects of Single-Event Upsets (SEUs) in Single-Event Upset (SRAM)-based field-programmable gate arrays (FPGAs), where these faults may cause changes in the configuration of logic… read more here.

Keywords: cost reliability; sram based; cost; approach ... See more keywords

A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection

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recommendations! Published in 2018 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2017.2717490

Abstract: Compared with application specific integrated circuits (ASICs), static random access memory (SRAM)-based field programmable gate arrays (FPGAs) respond differently to radiation due to the configuration memory vulnerability. In this brief, the differences between the permanent… read more here.

Keywords: based fpgas; error; fault injection; sram based ... See more keywords

Preselection Methods to Achieve Very Low BER in SRAM-Based PUFs—A Tutorial

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recommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3170460

Abstract: The most prevalent industrial PUFs (physical unclonable functions) utilize SRAM-based designs. Bit stability is one of the fundamental problems in PUF design. PUF circuits, which rely on silicon manufacturing mismatches to produce a random key,… read more here.

Keywords: preselection methods; based pufs; methods achieve; tutorial preselection ... See more keywords

A Brain-Inspired ADC-Free SRAM-Based In-Memory Computing Macro With High-Precision MAC for AI Application

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recommendations! Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3224049

Abstract: In this brief, an ADC-free SRAM-based IMC macro is proposed, which enables energy-efficient and high-precision MAC operation by brain-inspired computing. We identify two key features that support IMC macro to achieve high energy efficiency and… read more here.

Keywords: high precision; imc macro; precision mac; sram based ... See more keywords

Fast Update Algorithm With Reorder Mechanism for SRAM-Based Longest Prefix Matching on FPGA

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recommendations! Published in 2024 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2023.3304014

Abstract: Longest prefix matching (LPM) is often used in network forwarding and it is usually implemented by ternary content addressable memory (TCAM) on field programmable gate array (FPGA). The traditional SRAM based TCAM only has one… read more here.

Keywords: sram based; prefix; update latency; mechanism ... See more keywords