Articles with "sram cell" as a keyword



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Power-aware sourse feedback single-ended 7T SRAM cell at nanoscale regime

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Published in 2019 at "Microsystem Technologies"

DOI: 10.1007/s00542-017-3570-y

Abstract: This article presents a low power and highly stable source feedback SE7T (single-ended 7T) SRAM cell. Using Monte-Carlo simulations critical design metrics of proposed SE7T SRAM cell are estimated and the estimated results are compared… read more here.

Keywords: single ended; power; feedback; sram cell ... See more keywords
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Design of SRAM cell for low power portable healthcare applications

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Published in 2020 at "Microsystem Technologies"

DOI: 10.1007/s00542-020-04809-6

Abstract: Biomedical applications such as body area networks (BANs) require the design of power-efficient SRAM cells for the extended battery lives of BAN sensor nodes. In this work, we have proposed a bit-interleaving supporting, robust, low-power… read more here.

Keywords: fd8t; power; sram cell; design sram ... See more keywords
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A Schmitt-trigger based low read power 12T SRAM cell

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Published in 2020 at "Analog Integrated Circuits and Signal Processing"

DOI: 10.1007/s10470-020-01718-6

Abstract: In this article, a Schmitt trigger based 12-Transistors(ST12T) static random-access memory (SRAM) bit-cell has been proposed. The Read Power of proposed cell is reduced by 29.17%/ 24.14% /7.66% /5.87% /7.67% /16.62% when compared to 6T/… read more here.

Keywords: read power; sram cell; cell; schmitt trigger ... See more keywords
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A low-leakage and high-writable SRAM cell with back-gate biasing in FinFET technology

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Published in 2019 at "Journal of Computational Electronics"

DOI: 10.1007/s10825-019-01327-1

Abstract: This paper presents a novel low-leakage and high-writable 8T SRAM cell based on FinFET technology. This cell reduces leakage current and consequently leakage power by dynamically adjusting the back gate of the stacked independent-gate FinFET… read more here.

Keywords: leakage high; sram cell; cell; high writable ... See more keywords
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Low Power Consuming 1 KB (32 × 32) Memory Array Using Compact 7T SRAM Cell

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Published in 2017 at "Wireless Personal Communications"

DOI: 10.1007/s11277-017-4226-z

Abstract: Rapid increase in technology is showing a great perception in assessing the complexity of design that can be integrated on a single chip dramatically. Minimum feature sizes, low power consumption, minimum cost and high performance… read more here.

Keywords: array; sram; sram cell; low power ... See more keywords
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Design of a Schmitt-Trigger-Based 7T SRAM cell for variation resilient Low-Energy consumption and reliable internet of things applications

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Published in 2021 at "AEU - International Journal of Electronics and Communications"

DOI: 10.1016/j.aeue.2021.153899

Abstract: Abstract The internet of things (IoTs)-based systems require battery-enabled energy-efficient memory circuits to operate at low voltage domain, especially below the transistor’s threshold. This study presents a single-ended 7T SRAM cell for IoTs applications. Cell… read more here.

Keywords: energy; sram cell; proposed sram; consumption ... See more keywords
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Reliable and high performance asymmetric FinFET SRAM cell using back-gate control

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Published in 2020 at "Microelectronics Reliability"

DOI: 10.1016/j.microrel.2019.113545

Abstract: Abstract As the technology scales down, the performance characteristics are degraded and the reliability of digital circuits against soft error and aging effects are reduced. In this paper, we propose a reliable asymmetric FinFET 6T… read more here.

Keywords: asymmetric finfet; sram cell; back gate; finfet sram ... See more keywords
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Design of an enhanced write stability, high-performance, low power 11T SRAM cell

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Published in 2021 at "International Journal of Electronics"

DOI: 10.1080/00207217.2020.1870738

Abstract: In the present era of diminishing technology nodes, stability and performance of SRAM cells deteriorate. To cope up with the above growing concerns, a new 11 T SRAM cell has been proposed which imp... read more here.

Keywords: sram; sram cell; performance; design enhanced ... See more keywords
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Design and mathematical analysis of a 7T SRAM cell with enhanced read SNM using PMOS as an access transistor

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Published in 2021 at "Circuit World"

DOI: 10.1108/cw-05-2020-0095

Abstract: Purpose This work is proposed for low power energy-efficient applications like laptops, mobile phones, and palmtops. In this study, P-channel metal–oxide–semiconductor (PMOS)’s are used as access transistor in 7 transistors (7 T) Static Random Access Memory… read more here.

Keywords: cell; access transistor; power; sram cell ... See more keywords
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Investigation of Radiation Hardened TFET SRAM Cell for Mitigation of Single Event Upset

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Published in 2020 at "IEEE Journal of the Electron Devices Society"

DOI: 10.1109/jeds.2020.3002265

Abstract: This study analyzes the soft error sensitivity of SRAM cell which employs double-gate tunnel field effect transistor (DG TFET). The mitigation technique for the data recovery after the heavy ion strike is discussed. The conventional… read more here.

Keywords: radiation; tfet sram; sram cell; mitigation ... See more keywords
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We-Quatro: Radiation-Hardened SRAM Cell With Parametric Process Variation Tolerance

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Published in 2017 at "IEEE Transactions on Nuclear Science"

DOI: 10.1109/tns.2017.2728180

Abstract: Under radiation environment, conventional SRAMs suffer from high soft-error rate. To address this challenge, several radiation-hardened static-random access-memory (SRAM) cells such as twelve-transistor (12T) Dice and ten-transistor (10T) Quatro have been developed. Quatro is more… read more here.

Keywords: radiation hardened; sram cell; cell; quatro ... See more keywords