Design and Simulation of Single Electron Transistor based SRAM and its Memory Controller at Room Temperature
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DOI: 10.30880/ijie.2019.11.06.020
Abstract: Heterogeneous 3D integration of single electron transistor (SET) circuits with CMOS based circuits is achieved by stacking a SET layer above CMOS IC. Low power and delay efficient circuits can be designed using SET. In… read more here.
Keywords: temperature; single electron; sram memory; based sram ... See more keywords