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Published in 2020 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2020.3000737
Abstract: In this article, a single-layer complementary latch (CL) and one multilayer CL which are fully compatible with standard FinFET CMOS processes are characterized and their applications are extensively discussed. Through the complementary pair with the…
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Keywords:
hybrid gate;
memory logic;
stackable complementary;
memory ... See more keywords