Articles with "stacked dram" as a keyword



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Improving DRAM Performance in 3-D ICs via Temperature Aware Refresh

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Published in 2017 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"

DOI: 10.1109/tvlsi.2016.2606085

Abstract: The 3-D integration allows IC designs to stack DRAM directly on the top of execution units, which greatly reduces DRAM access latency and improves memory bandwidth. Unfortunately, the heat generated by the processor unit cannot… read more here.

Keywords: temperature; temperature aware; improving dram; aware refresh ... See more keywords