3-D Stacked Synapse Array Based on Charge-Trap Flash Memory for Implementation of Deep Neural Networks
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DOI: 10.1109/ted.2018.2881972
Abstract: This paper proposes a synaptic device based on charge-trap flash memory that has good CMOS compatibility and superior reliability characteristics compared with other synaptic devices. Using hot-electron injection and hot-hole injection, we designed operation methods… read more here.
Keywords: flash memory; charge trap; stacked synapse; trap flash ... See more keywords