A 2.4-GS/s Power-Efficient, High-Resolution Reconfigurable Dynamic Comparator for ADC Architecture
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DOI: 10.1007/s00034-020-01371-4
Abstract: Reconfigurability is an important capability that provides flexibility in computing architecture and low-power technique. It is challenging in digital-in-concept for designing smart analog circuits operated on low power. This work presents a low-power, low-noise, and… read more here.
Keywords: comparator; stage comparator; power; low power ... See more keywords