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Published in 2024 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2024.3401593
Abstract: We propose a digital bang-bang phase locked-loop (DBPLL) whose output rms jitter can be set to a user-defined value. By using a stochastic jitter monitoring circuit (JMC) and automatic loop bandwidth control, the proposed BBPLL…
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Keywords:
digital bang;
stochastic jitter;
pll;
jitter ... See more keywords