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Published in 2019 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2018.2885540
Abstract: This paper presents a sub-baud-rate clock and data recovery (CDR) circuit that can recover clock and data using only differential quarter-rate clocks. A combination of eight samplers and an integrator recover four data bits in…
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Keywords:
sub baud;
baud rate;
rate;
clock ... See more keywords
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Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2022.3169006
Abstract: A reference-less sub-baud-rate linear clock and data recovery with a frequency acquisition is proposed to operate from 6 to 11 Gb/s. The proposed frequency acquisition technique operating at a single differential quarter-rate clock and sharing…
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Keywords:
rate linear;
baud rate;
frequency;
sub baud ... See more keywords
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Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2022.3200979
Abstract: A 16-Gb/s edge-based sub-baud-rate digital clock and data recovery (CDR) circuit is presented. By using the proposed edge-based sub-baud-rate technique and a passive high-pass filter, the complementary clocks are used to save the power. To…
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Keywords:
baud rate;
cdr circuit;
rate;
sub baud ... See more keywords